1GHz CMOS down-conversion mixer

被引：2
|
作者：
Lee, S [1 ]
Yoo, C [1 ]
Kim, W [1 ]
Ryu, HK [1 ]
Song, W [1 ]
机构：
[1] Seoul Natl Univ, Sch Elect Engn, Kwanak Gu, Seoul 151742, South Korea
来源：
ISCE '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS | 1997年
关键词：
D O I：
10.1109/ISCE.1997.658368
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
A 1GHz CMOS down-conversion mixer is described in this paper. The mixer is of differential architecture where the common-mode feedback circuit is eliminated by employing:robust loads. Cascode stages are used to reduce the LO-to-RF feedthrough which is measured to be -79dB. A prototype mixer was implemented in a standard 0.8 mu m CMOS process and consumes 7.3mW at 3.3V supply. The power conversion gain is -0.8dB. The noise figure and the;input IP3 are 19dB and 0.6dBm, respectively.
引用
收藏
页码：125 / 127
页数：3
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