On Package Optics for the High-Speed Serdes Interconnects

被引：0

作者：

Vaidyanathan, Ajay K. ^{[1
]}

Yenubari, Praveen Kumar ^{[1
]}

Shanmugapriya, D. ^{[1
]}

Kumar, Sathish R. ^{[1
]}

机构：

[1] Intel Technol India Pvt Ltd, Bangalore, Karnataka, India

来源：

2022 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY & SIGNAL/POWER INTEGRITY, EMCSI | 2022年

关键词：

D O I：

10.1109/EMCSI39492.2022.10050243

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Owing to the ever-increasing data rate requirements on the Data Center Graphics (DCG) products, technologists are always looking for methodologies to improve power efficiency and channel performance of the High-speed IO interconnects. On-package optics provides the opportunity to shorten the Common Electrical IO (CEI) 112G channel length by tens of millimeters to enable a very short distance between ASIC and optics. This paper presents the on-package optical IC implementation that shrinks the electrical channel length drastically and thereby the losses and noise coupling between serdes channels.

引用

页码：459 / 459

页数：1

共 50 条

[1] Package Design for High-Speed SerDes
Young, Brian
Bhandal, Amarjit S.
2010 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGE & SYSTEMS SYMPOSIUM, 2010,
[2] Laminate package trends for high-speed system interconnects
Cases, M
de Araujo, DN
Pham, N
Blackshear, E
ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2003, : 147 - 150
[3] A high-speed transceiver with optical SerDes
Xu, Chaolong
Luo, Zhang
Li, Jinwen
Wang, Kefei
Pang, Zhengbin
AOPC 2015: OPTICAL FIBER SENSORS AND APPLICATIONS, 2015, 9679
[4] High-speed interconnects
Powers, G
AEROSPACE ENGINEERING, 2003, 23 (02) : 19 - 21
[5] Embedded Package Inductor for High Speed SerDes Design
Wu, Boping
Mo, Tingting
2016 17TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2016, : 994 - 995
[6] Embedded Package Inductor for High Speed SerDes Design
Wu, Boping
Mo, Tingting
Nan, Jianjun
9TH INTERNATIONAL CONFERENCE ON MICROWAVE AND MILLIMETER WAVE TECHNOLOGY (ICMMT 2016) PROCEEDINGS, VOL 2, 2016, : 1058 - 1060
[7] Test methods and ICs for high-speed serdes
Li, Mike
Roberts, Gordon
Proceedings of the Custom Integrated Circuits Conference, 2009,
[8] An Accurate Transient Analysis of High-Speed Package Interconnects Using Convolution Technique
Wendemagegnehu T. Beyene
Chuck Yuan
Analog Integrated Circuits and Signal Processing, 2003, 35 : 107 - 120
[9] An accurate transient analysis of high-speed package interconnects using convolution technique
Beyene, WT
Yuan, C
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2003, 35 (2-3) : 107 - 120
[10] Crosstalk Analysis of Delay-Insensitive Code in High-Speed Package Interconnects
Sun, Bo
Xu, Zhaoxin
MICROMACHINES, 2023, 14 (05)

← 1 2 3 4 5 →