A methodology for platform based high-level system-on-chip verification

被引：0
|
作者：
Gao, F [1 ]
Liu, P [1 ]
Yao, QD [1 ]
机构：
[1] Zhejiang Univ, Inst Informat & Commun Engn, Dept Informat Sci & Elect Engn, Hangzhou 310027, Peoples R China
来源：
CHINESE JOURNAL OF ELECTRONICS | 2003年 / 12卷 / 01期
关键词：
system on chip (SOC); hardware/software codesign; hardware/software co-verification; real time operating systems (RTOS);
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The time-to-market challenge has increased the need for shortening the co-verification time in system-on-chip development. In this article, a new methodology of high-level hardware/software co-verification is introduced. With the help of the real-time operating system, the application program can easily be migrated from the software simulator to the hardware emulation board. The hierarchical architecture can be used to separate application program from the implementation of the platform during the verification process. The high-level verification platform is successfully used in developing the HDTV decoding chip.
引用
收藏
页码：61 / 64
页数：4
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