An analytical approach to dynamic crosstalk in coupled interconnects

被引:24
|
作者
Kaushik, Brajesh Kumar [1 ]
Sarkar, Sankar [2 ]
Agarwal, Rajendra Prasad
Joshi, R. C. [1 ]
机构
[1] Indian Inst Technol Roorkee, Dept Elect & Comp Engn, Roorkee 247667, Uttarakhand, India
[2] Shobhit Univ, Sch Elect Engn, Meerut 250110, Uttar Pradesh, India
关键词
Coupled transmission lines; Crosstalk; VLSI CAD; Interconnections; Signal integrity; ON-CHIP INDUCTANCE; LINE TRANSIENT; TIME-DELAY; MODELS; EXPRESSIONS; SINGLE;
D O I
10.1016/j.mejo.2009.12.011
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper deals with waveform analysis, crosstalk peak and delay estimation of CMOS gate driven capacitively and inductively coupled interconnects. Simultaneously switching inputs for the coupled interconnects are considered. A transmission line-based coupled model of interconnect is used for analysis. Alpha-power Law model of MOS transistor is used to represent the transistors in CMOS driver. Peaks and delays at far-end of victim line are estimated for conditions when the inputs to the two coupled interconnects are switching in-phase and out-of-phase. The comparison of analytically obtained results with SPICE simulations show that the proposed model captures noise peak and their timing; 90% propagation delay; transition time delay and waveform shape with good accuracy, such as not more than 5% error in crosstalk peak estimation. (C) 2009 Elsevier Ltd. All rights reserved.
引用
收藏
页码:85 / 92
页数:8
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