Automatic data path generation from C code for custom processors

被引:0
|
作者
Trajkovic, Jelena [1 ]
Gajski, Daniel [1 ]
机构
[1] Univ Calif Irvine, Ctr Embedded Comp Syst, Irvine, CA 92623 USA
关键词
architecture; data path; design; synthesis; C-to-RTL; pipeline; performance; utilization;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The stringent performance constraints and short time to market of modern digital systems require automatic methods for design of high performance application-specific architectures. This paper presents a novel algorithm for automatic generation of custom pipelined data path for a given application from its C code. The data path optimization targets both resource utilization and performance. The input to this architecture generator includes application C code, operation execution frequencies obtained by the profile run and a component library consisting of functional units, busses, Multiplexers etc. The output is data path specified as a net-list of resource instances and their connections. The algorithm starts with an architecture that supports maximum parallelism for implementation of the input C code and iteratively refines it until an efficient resource utilization is obtained while maintaining the performance constraint. This paper also presents an algorithm to choose the priority of application basic blocks for optimization. Our experimental results show that automatically generated data paths satisfy given performance criteria and can he obtained in a matter of minutes leading to significant productivity gains.
引用
收藏
页码:107 / 120
页数:14
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