Formal Refinement in SysML

被引：0
|
作者：
Miyazawa, Alvaro [1 ]
Cavalcanti, Ana [1 ]
机构：
[1] Univ York, Dept Comp Sci, York YO10 5DD, N Yorkshire, England
来源：
INTEGRATED FORMAL METHODS, IFM 2014 | 2014年 / 8739卷
基金：
英国工程与自然科学研究理事会;
关键词：
D O I：
暂无
中图分类号：
TP31 [计算机软件];
学科分类号：
081202 ; 0835 ;
摘要：
SysML is a UML-based graphical notation for systems engineering that is becoming a de facto standard. Whilst it reuses a number of UML diagrams, it introduces new diagrams, and maintains the loose UML semantics. Refinement is a formal technique that supports the validation and verification of models by capturing a notion of correctness based on observable behaviour. In this paper, we analyse the issue of formal refinement in the context of SysML. First, we identify the requirements for supporting refinement in SysML, next we propose extensions to SysML that satisfy these requirements, and finally we present a few refinement laws and discuss their validity.
引用
收藏
页码：155 / 170
页数：16
相关论文
共 50 条
  • [1] Formal modeling with SysML
    Bouabana-Tebibel, Thouraya
    Rubin, Stuart H.
    Bennama, Miloud
    [J]. 2012 IEEE 13TH INTERNATIONAL CONFERENCE ON INFORMATION REUSE AND INTEGRATION (IRI), 2012, : 340 - 347
  • [2] Formal Models of SysML Blocks
    Miyazawa, Alvaro
    Lima, Lucas
    Cavalcanti, Ana
    [J]. FORMAL METHODS AND SOFTWARE ENGINEERING, 2013, 8144 : 249 - 264
  • [3] An approach to refinement checking of SysML requirements
    Makartetskiy, Denis
    Sisto, Riccardo
    [J]. 2011 IEEE 16TH CONFERENCE ON EMERGING TECHNOLOGIES AND FACTORY AUTOMATION (ETFA), 2011,
  • [4] Incremental and Formal Verification of SysML Models
    Sophie Coudert
    Ludovic Apvrille
    Bastien Sultan
    Oana Hotescu
    Pierre de Saqui-Sannes
    [J]. SN Computer Science, 5 (6)
  • [5] A Formal Model for the Requirements Diagrams of SysML
    Valles-Barajas, F.
    [J]. IEEE LATIN AMERICA TRANSACTIONS, 2010, 8 (03) : 259 - 268
  • [6] A case study in formal system engineering with SysML
    Dragomir, Iulia
    Ober, Iulian
    Lesens, David
    [J]. 2012 17TH INTERNATIONAL CONFERENCE ON ENGINEERING OF COMPLEX COMPUTER SYSTEMS (ICECCS), 2012, : 189 - 198
  • [7] 8.3.2 A Formal Universal Systems Semantics for SysML
    Hamilton, Margaret H.
    Hackler, William R.
    [J]. INCOSE International Symposium, 2007, 17 (01) : 1333 - 1357
  • [8] A formal verification framework for SysML activity diagrams
    Ouchani, Samir
    Mohamed, Otmane Ait
    Debbabi, Mourad
    [J]. EXPERT SYSTEMS WITH APPLICATIONS, 2014, 41 (06) : 2713 - 2728
  • [9] Using formal methods with SysML in aerospace design and engineering
    Henson Graves
    Yvonne Bijan
    [J]. Annals of Mathematics and Artificial Intelligence, 2011, 63 : 53 - 102
  • [10] On the formal interpretation and behavioural consistency checking of SysML blocks
    Jacobs, Jaco
    Simpson, Andrew
    [J]. SOFTWARE AND SYSTEMS MODELING, 2017, 16 (04): : 1145 - 1178
12345