Monolithic 3D integrated circuits

被引：0
|
作者：
Wong, Simon [1 ]
El-Gamal, Abbas [1 ]
Griffin, Peter [1 ]
Nishi, Yoshio [1 ]
Pease, Fabian [1 ]
Plummer, James [1 ]
机构：
[1] Stanford Univ, Elect Engn, Stanford, CA 94305 USA
来源：
2007 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS (VLSI-TSA), PROCEEDINGS OF TECHNICAL PAPERS | 2007年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
3D IC's promise to solve the 2D communication bottleneck, and enable the integration of heterogeneous materials, devices and systems. There are at least three approaches to realize 3D IC's : chip stacking, wafer stacking and full monolithic integration. Each approach is at a different level of maturity and offers various degree of improvement. This paper will focus on the monolithic 3D approach, which offers a high density of device-dimension vertical interconnects and thereby facilitates the optimal assembly of transistors and interconnects in a 3D volume. The performance advantages of such a technology are demonstrated with a 3D-FPGA. Technology challenges of monolithic approach are discussed.
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页码：66 / +
页数：2
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