TxRace: Efficient Data Race Detection Using Commodity Hardware Transactional Memory

被引:20
|
作者
Zhang, Tong [1 ]
Lee, Dongyoon [1 ]
Jung, Changhee [1 ]
机构
[1] Virginia Tech, Blacksburg, VA 24061 USA
关键词
data race; concurrency bug detection; hardware transactional memory; dynamic program analysis;
D O I
10.1145/2954679.2872384
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Detecting data races is important for debugging shared-memory multithreaded programs, but the high runtime overhead prevents the wide use of dynamic data race detectors. This paper presents TxRace, a new software data race detector that leverages commodity hardware transactional memory (HTM) to speed up data race detection. TxRace instruments a multithreaded program to transform synchronization-free regions into transactions, and exploits the conflict detection mechanism of HTM for lightweight data race detection at runtime. However, the limitations of the current best-effort commodity HTMs expose several challenges in using them for data race detection: (1) lack of ability to pinpoint racy instructions, (2) false positives caused by cache line granularity of conflict detection, and (3) transactional aborts for non-conflict reasons (e.g., capacity or unknown). To overcome these challenges, TxRace performs lightweight HTM-based data race detection at first, and occasionally switches to slow yet precise data race detection only for the small fraction of execution intervals in which potential races are reported by HTM. According to the experimental results, TxRace reduces the average runtime overhead of dynamic data race detection from 11.68x to 4.65x with only a small number of false negatives.
引用
收藏
页码:159 / 173
页数:15
相关论文
共 50 条
  • [1] Using Hardware Transactional Memory for Data Race Detection
    Gupta, Shantanu
    Sultan, Florin
    Cadambi, Srihari
    Ivancic, Franjo
    Roetteler, Martin
    [J]. 2009 IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL & DISTRIBUTED PROCESSING, VOLS 1-5, 2009, : 267 - +
  • [2] Hardware Acceleration of Transactional Memory on Commodity Systems
    Casper, Jared
    Oguntebi, Tayo
    Hong, Sungpack
    Bronson, Nathan G.
    Kozyrakis, Christos
    Olukotun, Kunle
    [J]. ACM SIGPLAN NOTICES, 2011, 46 (03) : 27 - 38
  • [3] Virtues and Limitations of Commodity Hardware Transactional Memory
    Diegues, Nuno
    Romano, Paolo
    Rodrigues, Luis
    [J]. PROCEEDINGS OF THE 23RD INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES (PACT'14), 2014, : 3 - 14
  • [4] Efficient Management of Speculative Data in Hardware Transactional Memory Systems
    Waliullah, M. M.
    Stenstrom, Per
    [J]. 2008 INTERNATIONAL CONFERENCE ON EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING AND SIMULATION, PROCEEDINGS, 2008, : 158 - 164
  • [5] FaulTM: Error Detection and Recovery Using Hardware Transactional Memory
    Yalcin, Gulay
    Unsal, Osman
    Cristal, Adrian
    [J]. DESIGN, AUTOMATION & TEST IN EUROPE, 2013, : 220 - 225
  • [6] Efficient Transaction Nesting in Hardware Transactional Memory
    Liu, Yi
    Su, Yangming
    Zhang, Cui
    Wu, Mingyu
    Zhang, Xin
    Li, He
    Qian, Depei
    [J]. ARCHITECTURE OF COMPUTING SYSTEMS - ARCS 2010, PROCEEDINGS, 2010, 5974 : 138 - +
  • [7] Efficient Shellcode Detection on Commodity Hardware
    Tian, Donghai
    Chen, Mo
    Hu, Changzhen
    Li, Xuanya
    [J]. IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2013, E96D (10) : 2272 - 2276
  • [8] Parallelizing Sequential Applications on Commodity Hardware using a Low-cost Software Transactional Memory
    Mehrara, Mojtaba
    Hao, Jeff
    Hsu, Po-Chun
    Mahlke, Scott
    [J]. PLDI'09 PROCEEDINGS OF THE 2009 ACM SIGPLAN CONFERENCE ON PROGRAMMING LANGUAGE DESIGN AND IMPLEMENTATION, 2009, : 166 - 176
  • [9] Consolidated Conflict Detection for Hardware Transactional Memory
    Zhao, Lihang
    Draper, Jeffrey
    [J]. PROCEEDINGS OF THE 23RD INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES (PACT'14), 2014, : 201 - 212
  • [10] Legato: End-to-End Bounded Region Serializability Using Commodity Hardware Transactional Memory
    Sengupta, Aritra
    Cao, Man
    Bond, Michael D.
    Kulkarni, Milind
    [J]. CGO'17: PROCEEDINGS OF THE 2017 INTERNATIONAL SYMPOSIUM ON CODE GENERATION AND OPTIMIZATION, 2017, : 1 - 13