Latest material technologies for Fan-Out Wafer Level Package

被引：0
|
作者：
Watanabe, Itaru [1 ]
Kouda, Masaya [1 ]
Makihara, Koji [1 ]
Shinozaki, Hiroki [1 ]
机构：
[1] Sumitomo Bakelite Co LTD, Elect Device Mat Res Lab, Nogata, Fukuoka, Japan
来源：
2017 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE (CSTIC 2017) | 2017年
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中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Currently Wafer Level Package(WLP) is one of famous package structure in mobile consumer electronics industry because of cost, size, density and electrical performance. Recently one of the famous smart phone have on-board new application processor which include Fan-Out Wafer Level Package(FOWLP) as a bottom package in package on package. The selection of process and machines, materials for next-generation FOWLP were settled once. But many players still are looking for a suitable assembly method for FOWLP. So we would like to introduce latest technology and future tasks of the materials which include epoxy molding compound(EMC) and peripheral material.
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页数：3
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