A Simulink-to-FPGA co-design of encryption module

被引：0
|
作者：
Li, Xiaoying [1 ]
Sun, Fuming [2 ]
Wu, Enhua [3 ]
机构：
[1] Univ Macau, Dept Comp & Informat Sci, FST, Macau, Peoples R China
[2] Univ Sci & Technol, Sch Informat Engn, Beijing, Peoples R China
[3] Chinese Acad Sci, Inst Software, State Key Lab Comp Sci, Beijing, Peoples R China
来源：
2006 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS | 2006年
关键词：
arithmetic unit; modulo; Simulink; FPGA;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, circuit design of an arithmetic module applied to cryptography - Modulo Multiplicative Inverse is presented and implemented using FPGA hardware technology. This modular arithmetic function contains iterative computations of division, multiplication and accumulation with variable loop times. Besides standard HDL programming and schematic input, Simuhnk-to-FPGA has been tried as a different design flow. Experimental results are compared between different design methods with discussion of their pros and cons.
引用
收藏
页码：2008 / +
页数：2
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