A Two-Stage Wake-Up Circuit for Semi-Passive RFID Tag

被引：6
|
作者：
Chen, Wei [1 ]
Che, Wenyi [1 ]
Wang, Xiao [1 ]
Huang, Chenling [1 ]
Yan, Na [1 ]
Min, Hao [1 ]
Tan, Jie [2 ]
机构：
[1] Fudan Univ, State Key Lab ASIC & Syst, Autoid Lab, Shanghai 200433, Peoples R China
[2] Inst Automat, Chinese Acad Sci, Beijing, Peoples R China
来源：
2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS | 2009年
基金：
国家高技术研究发展计划(863计划);
关键词：
Two-stage wake-up strategy; self-calibration; low power; PVT insensitive; UHF; DESIGN;
D O I：
10.1109/ASICON.2009.5351345
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A two-stage wake-up circuit for semi-passive Radio Frequency Identification (RFID) tag is designed and implemented in SMIC 0.18 mu m CMOS technology. In order to prolong the tag's battery life, a novel two-stage wake-up strategy with self-calibration is proposed Measurement results show that the wake-up circuit has no static power and is free of Process, Voltage and Temperature (PVT) variations.
引用
收藏
页码：553 / +
页数：2
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