Reliability-Aware Dynamic Voltage and Frequency Scaling

被引：3

作者：

Firouzi, F. ^{[1
]}

Salehi, M. E. ^{[1
]}

Wang, F. ^{[2
]}

Fakhraie, S. M. ^{[1
]}

Safari, S. ^{[1
]}

机构：

[1] Univ Tehran, Sch Elect & Comp Engn, North Kargar Ave, Tehran, Iran

[2] Juniper Networks Inc, Sunnyvale, CA USA

来源：

IEEE ANNUAL SYMPOSIUM ON VLSI (ISVLSI 2010) | 2010年

关键词：

ARCHITECTURAL VULNERABILITY FACTOR;

D O I：

10.1109/ISVLSI.2010.54

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Dynamic voltage and frequency scaling (DVFS) is an effective method for controlling energy dissipation of embedded systems. However, recent researches have illustrated that DVFS techniques have compromising effects on the system reliability. Our analysis results show that, ignoring the effects of voltage scaling on fault rate could considerably decrease the system reliability. Therefore, we use the slack time to increase system reliability as well as to save energy by frequency and voltage scaling techniques. We first investigate the effects of frequency and voltage scaling on the system reliability exploiting the proposed formula and then propose a reliability-aware DVFS scheme in which the frequency and voltage are scaled considering reliability and performance constraints. Comparing the results to that of the traditional DVFS methods the proposed reliability-aware DVFS yields 50% better power saving for the same reliably level.

引用

页码：304 / 309

页数：6

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