Fast Bring-Up of an AI SoC through IEEE 1687 Integrating Embedded TAPs and IEEE 1500 Interfaces

被引：1

作者：

Ma, Haiying ^{[1
]}

Lu, Ligang ^{[1
]}

Qian, Haitao ^{[1
]}

Han, Jing ^{[1
]}

Wen, Xin ^{[2
]}

Meng, Fanjin ^{[2
]}

Singhal, Rahul ^{[3
]}

Keim, Martin ^{[3
]}

Huang, Yu ^{[3
]}

Yang, Wu ^{[3
]}

机构：

[1] Enflame Technol, Shanghai, Peoples R China

[2] Mentor, Beijing, Peoples R China

[3] Mentor, Wilsonville, OR USA

来源：

2020 IEEE INTERNATIONAL TEST CONFERENCE (ITC) | 2020年

关键词：

IEEE; 1687; IJTAG; embedded TAP; AI Chip;

D O I：

10.1109/ITC44778.2020.9325251

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

Complex application specific SoC are being developed for hardware support artificial intelligence (AI) applications. Such a complex SoCs are integrating a large number of on-chip and off-chip memories, numerous cores and interfaces including in our case a hierarchy of embedded TAPs, as well as security measures and Design-For-Test (DFT) structures. In this case-study paper, we demonstrate using IEEE 1687-2014 (IJTAG) to integrate all these different components into a single, unifying methodology. From this, we derive the benefits of workflow efficiency and fast silicon bring-up. For example, we can report that silicon bring-up of the DFT of the entire SoC was completed in about 4 days, and other bring-up aspects of the Soc were also completed in very little time.

引用

页数：5