SNrram: An Efficient Sparse Neural Network Computation Architecture Based on Resistive Random -Access Memory

被引:63
|
作者
Wang, Peiqi [1 ,2 ]
Ji, Yu [1 ,2 ]
Hong, Chi [1 ]
Lyu, Yongqiang [1 ]
Wang, Dongsheng [1 ]
Xie, Yuan [2 ]
机构
[1] Tsinghua Univ, Beijing, Peoples R China
[2] Univ Calif Santa Barbara, Santa Barbara, CA 93106 USA
关键词
Neural network; sparsity; resistive random access memory; architecture;
D O I
10.1145/3195970.3196116
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
The sparsity in the deep neural networks can be leveraged by methods such as pruning and compression to help the efficient deployment of large-scale deep neural networks onto hardware platforms, such as GPU or FPGA, for better performance and power efficiency. However, for RRAM crossbar based architectures, the study of efficient methods to consider the network sparsity is still in the early stage. In this study, we propose SNrram, an efficient sparse neural network computation architecture using RRAM, by exploiting the sparsity in both weights and activation. SNrram stores nontrivial weights and organizes them to eliminate zero value multiplications for better resource utilization. Experimental results show that SNrram can save RRAM resources by 69.8%, reduce the power consumption by 35.9%, and speed up by 2.49x on popular deep learning benchmarks, compared to a state-of-the-art RRAM-based neural network accelerator.
引用
收藏
页数:6
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