Real time image segmentation using FPGA and parallel processor

被引：0
|
作者：
Miteran, J
Bailly, R
Gorria, P
机构：
来源：
1996 IEEE TENCON - DIGITAL SIGNAL PROCESSING APPLICATIONS PROCEEDINGS, VOLS 1 AND 2 | 1996年
关键词：
D O I：
暂无
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
We present in this paper the realization of a classification board, for real-time image segmentation. The classification of each pixel is completed using a real time extraction of attributs and a geometric classification method by stress polytope training, which ensures a high decision speed (100 ns per pixels) and good performances. The decision operator has been integrated in the form of a full custom circuit, and the extraction of parameters is performed using a single high density FPGA.
引用
收藏
页码：233 / 236
页数：4
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