Hardware-in-the-loop real-time simulation interface software design

被引:0
|
作者
Li, Z [1 ]
Kyte, M [1 ]
Johnson, B [1 ]
机构
[1] Univ Idaho, Natl Inst Adv Transportat Technol, Moscow, ID 83844 USA
关键词
HILS; CID; traffic controller; shared memory; DDE; and simulation;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
For years, traffic engineers have used traffic simulation software to develop, model, and test signal timing plans. However, before timing plans can be implemented in the field, they must be fine-tuned in an actual traffic controller operating under actual intersection conditions. Testing a signal timing plan in the field can cause minor or even major traffic disruption, creating delay and frustration for motorists and pedestrians alike. Real-time hardware-in-the-loop traffic simulation (HILS) can test timing plans in the office or lab rather than in the field. The Controller Interface Device (CID) is the key component of the real-time simulation system. This paper provides an overview of real-time hardware-in-the-loop simulation and a discussion of the CID hardware design. Finally, HILS interface software design for three different simulation models (CORISM, VISIM, SimTraffic) is be explained.
引用
收藏
页码:1012 / 1017
页数:6
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