A unified approach for scheduling and allocation

被引：4
|
作者：
Moreno, R [1 ]
Hermida, R [1 ]
Fernandez, M [1 ]
Mecha, H [1 ]
机构：
[1] Univ Complutense Madrid, Fac Ciencias Fis, Dpto Arquitectura Comp & Automat, E-28040 Madrid, Spain
来源：
INTEGRATION-THE VLSI JOURNAL | 1997年 / 23卷 / 01期
关键词：
high-level synthesis; scheduling; allocation; probabilities; design automation;
D O I：
10.1016/S0167-9260(97)00012-6
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents a methodology for the integration of scheduling and allocation in high-level synthesis. It shows how a previous global analysis of the data how graph structure and the module library features can be used as an appropriate guide to accelerate the process of finding solutions in the design space. Several bounding and guiding heuristics for a branch-and-bound-based exploration are presented. In addition to dealing with basic blocks, the scheduling and allocation method addresses also the treatment of conditional branches and loops.
引用
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页码：1 / 35
页数：35
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