Performance Evaluation and Comparative Analysis between Traditional CNTFET Based 9 T SRAM Cells

CNTFET is more prominent for its performance when compared with conventional CMOS even beyond the 10 nm technology node because of its excellent thermal conductivities, superior current capabilities, and ballistic transport operation. CNTFET based SRAM cell is already available with 6 T, 7 T, 8 T, 9 T, and 10 T, etc. on behalf of detailed literature review 9 T SRAM cell has been selected for performance evaluation. This paper is going to deal with the representation of traditional 9 T SRAM structures and their simulation with the conventional setup of all the design parameters. Performance has been evaluated with conventional setup, and it has been evaluated that what is the effect when the design parameters are varied. With the help of simulation, the impact of their variation can be observed for performance parameters. It was found after simulation that design parameters of 9 T CNTFET based SRAM cell affect its performance in terms of on-state current, power consumption, and delay. Each performance parameter is going to change with the variation of its design parameters. Consequently, is if found that delay is reduced approx. 33 to 70% with respective design parameters. Similarly, the required average power is increased by 25 to 47% along with the improvement of SNM from 12 to 23% with the variation of design parameters.