Dedicated Measurement Setup for Millimetre-Wave Silicon Integrated Antennas: BiCMOS and CMOS High Resistivity SOI Process Characterization

Thanks to the competitive performances of CMOS and BiCMOS transistors, we are able to integrate the complete RF front-end on a same silicon substrate, including the antenna. In this paper, we describe a state-of-the-art measurement setup dedicated to the full characterization of silicon integrated antennas. This anechoic chamber is able to address radiation pattern and gain extraction as well as return loss measurements as far as the appropriate calibration technique is applied. First, a standard 22.5 dBi-gain horn antenna is measured to validate the extraction method. Then, a 40 GHz dipole antenna on a low resistivity substrate and a 60 GHz folded-slot antenna on a high resistivity SOI substrate are characterized. Gain values of -11.9 dBi and -0.4 dBi are extracted, respectively. For these antennas we are also able to plot their radiation pattern in their E and H planes.