Design and Optimization of ColdFire CPU Arithmetic Logical Unit

被引：0
|
作者：
Adamec, Filip [1 ]
Fryza, Tomas [1 ]
机构：
[1] Brno Univ Technol, Dept Radio Elect, Brno, Czech Republic
来源：
MIXDES 2009: PROCEEDINGS OF THE 16TH INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 2009年
关键词：
Arithmetic Logical Unit; VHDL; FPGA; instructions;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This article describes design of ColdFire microprocessor ALU (Arithmetic Logical Unit) in VHDL language and presents an optimization to obtain maximum performance in Xilinx Virtex IV FPGA. The basic function of ALU is explained. There are described the instructions which any ALU must handle and some possibility how to design it. The advantages and disadvantages of performance are obtained as well.
引用
收藏
页码：699 / 702
页数：4
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