Issues in the design of a test set-up for high-speed A/D converters

被引:0
|
作者
Boni, A [1 ]
Chiorboli, G [1 ]
Morandi, C [1 ]
机构
[1] Univ Parma, Dipartimento Ingn Informaz, I-43100 Parma, Italy
关键词
analog-to-digital converters; design of test-boards; testing; noise;
D O I
10.1016/S0263-2241(99)00036-6
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Several factors need to be considered when testing high-speed analog-to-digital converters (ADCs). Just to mention a few, phase noise of the signal generators, proper power supply decoupling, single-ended versus differential input configurations, capacitor versus transformer coupling of input and clock signals. This paper describes the typical problems encountered in the design of test-boards for high-speed ADCs and some of the possible solutions. Simulations and measurement results are provided. (C) 2000 Elsevier Science Ltd. All rights reserved.
引用
收藏
页码:105 / 114
页数:10
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