Modulo 2n-2 Arithmetic Units

被引:0
|
作者
Vassalos, Evangelos [1 ]
Bakalis, Dimitris [1 ]
机构
[1] Univ Patras, Dept Phys, Elect Lab, GR-26110 Patras, Greece
来源
关键词
Digital signal processing; modulo arithmetic; residue number system; adder; multiplier; residue generator; RESIDUE NUMBER SYSTEM; BINARY CONVERTER; IMPLEMENTATION; ARCHITECTURE; DESIGN;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A modulo 2(n)-2 value has been proposed in Residue Number System (RNS)-based systems for the design of FIR filters and communication components. However, all modulo 2(n)-2 arithmetic units that were used have been based either on look-up tables or on generic modulo arithmetic structures. In this work we propose novel modulo 2(n)-2 adder, multiplier as well as residue generation architectures that take advantage of the inherent properties of modulo 2(n)-2 arithmetic. The proposed circuits are based on corresponding circuits for modulo 2(n-1)-1 arithmetic and some simple logic resulting that way to efficient implementations regarding the area, delay and average power dissipation. The evaluation and experimental results of the proposed circuits confirm their efficiency.
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页码:1800 / 1807
页数:8
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