ASIC Design and Implementation of Pre-Processing for Image Target Recognition

被引：0
|
作者：
Bian, Mingming [1 ]
Liu, Feng [1 ]
Bi, Fukun [1 ]
Wang, Jinghua [1 ]
机构：
[1] Beijing Inst Technol, Radar Res Lab, Sch Informat & Elect, Beijing, Peoples R China
来源：
PROCEEDINGS OF 2010 INTERNATIONAL SYMPOSIUM ON IMAGE ANALYSIS AND SIGNAL PROCESSING | 2010年
关键词：
Image target recognition; Pre-processing; Feature extraction; ASIC design; FPGA prototype verification;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper introduced the development of image target recognition, and discussed the general process steps of image target recognition, the order of which is pre-processing, feature extraction, identification and fusion. The implementation flow of image pre-processing is also described in great detail in this paper because image pre-processing is important for image target recognition. The three key processing steps of image pre-processing are: filtering and noise reduction, image enhancement, and image segmentation. In addition, the ASIC implementation of pre-processing for image target recognition and the results of FPGA prototype verification are given. A brief analysis of the results is also presented.
引用
收藏
页码：1 / 4
页数：4
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