Low voltage and low power aspects of data converter design

被引：0
|
作者：
Huang, QT [1 ]
机构：
[1] Swiss Fed Inst Technol, Integrated Syst Lab, ETH, Zurich, Switzerland
来源：
ESSCIRC 2004: PROCEEDINGS OF THE 30TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE | 2004年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Low voltage design is becoming an important issue for analogue circuits expected to operate around 1V supply in sub 100nm CMOS technologies. This contribution discusses the impact of low voltage on circuit architecture, opamp configuration to maintain speed and DC gain, common-mode feedback and its stability, switching speed, as well as trends in achievable signal to noise ratio and speed for a given power consumption.
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页码：29 / 35
页数：7
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