Real-time microvision system with three-dimensional integration structure

A number of two-dimensional LSIs (2D-LSIs) with the thickness of around 30 mu m which play amplifying and converting image signal and some arithmetic operations are integrated vertically in order to achieve a real-time microvision system. This microvision system transfers the two-dimensional (2D) image data arrays as it is using high density vertical interconnections. So, the image information signal are processed in parallel in each LSI and the processings are performed in pipeline over all the system. In this study we design the test chap which plays edge detection by Laplacian operator. In CAD simulation, the processing time of the edge detection takes about 10 mu sec using 2 mu m CMOS design rule. In fabrication, grinding and chemical-mechanical polishing techniques are used to thin the wafer to 30 mu m. The thinned wafer with buried interconnections is bonded vertically to a thick wafer through micro-bumps after careful alignment by the newly developed wafer aligner with the alignment tolerance of 1 mu m. The microvision system with 30 integration structure can be fabricated by repeating such sequence.