Fast algorithms for implementation of Montgomery's modular multiplication technique

被引：6
|
作者：
Mohan, PVA [1 ]
机构：
[1] ECIL, Bangalore 560052, Karnataka, India
来源：
CIRCUITS SYSTEMS AND SIGNAL PROCESSING | 2004年 / 23卷 / 06期
关键词：
fast algorithms; modular multiplication; Montgomery's algorithm; multibit recoding; Rivest; Shamir; and Adleman (RSA) implementation; modular exponentiation; high-radix implementations; very large-scale integration (VLSI) architectures;
D O I：
10.1007/s00034-004-0820-x
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, algorithms for fast implementations of Montgomery's modular multiplication algorithm are proposed. These algorithms use nonredundant multibit recoding. Two techniques, one based on multiplication followed by estimation of scaled residue and the other involving integrated multiplication with scaled residue estimation, have been considered in detail. Techniques for simplifying the computation to estimate the multiple of the modulus to be added have been described. The area and computation time requirements of the proposed techniques are estimated for a general radix in order to highlight the time-space trade-offs.
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页码：463 / 478
页数：16
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