Highly scalable Z-RAM with remarkably long data retention for DRAM application

被引：0

作者：

Jang, Tae-Su ^{[1
]}

Kim, Joong-Sik ^{[1
]}

Hwang, Sang-Min ^{[1
]}

Oh, Young-Hoon ^{[1
]}

Rho, Kwang-Myung ^{[1
]}

Chung, Seoung-Ju ^{[1
]}

Chung, Su-Ock ^{[1
]}

Oh, Jae-Geun ^{[1
]}

Bhardwaj, Sunil ^{[2
]}

Kwon, Jungtae ^{[2
]}

Kim, David ^{[2
]}

Nagoga, Mikhail ^{[2
]}

Kim, Yong-Taik ^{[1
]}

Cha, Seon-Yong ^{[1
]}

Moon, Seung-Chan ^{[1
]}

Chung, Sung-Woong ^{[1
]}

Hong, Sung-Joo ^{[1
]}

Park, Sung-Wook ^{[1
]}

机构：

[1] Hynix Semicond Inc, R&D Div, San 136-1 Ami Ri, Ichon Si 467701, Kyoungki Do, South Korea

[2] Innovat Silicon Inc, Santa Clara, CA 95054 USA

来源：

2009 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2009年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The operating characteristics and retention times of floating body cells and arrays using Z-RAM (R) technology fabricated on a 50nm DRAM process are presented. For the first time, data retention time longer than 8s at 93 degrees C and 1.6V wide programming window are obtained on floating body cells as small as 54nm x 54nm. These results demonstrate the suitability of floating body memories for DRAM applications. These improvements were obtained through optimization of DRAM technology such as junction engineering, thermal treatments, and improved passivation processes.

引用

页码：234 / +

页数：2

共 17 条

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