Operational Transconductance Amplifier Structured Highly Linear Analog Multiplier

被引：0
|
作者：
Khade, Amitkumar S. [1 ]
Vyas, Vibha [2 ]
机构：
[1] Cummins Coll Engn Women, E&TC Dept, Pune, Maharashtra, India
[2] Coll Engn Pune, E&TC Dept, Pune, Maharashtra, India
来源：
PROCEEDINGS OF THE THIRD INTERNATIONAL CONFERENCE ON MICROELECTRONICS, COMPUTING AND COMMUNICATION SYSTEMS, MCCS 2018 | 2019年 / 556卷
关键词：
Component; Formatting; Style; Styling; LOW-POWER; CMOS;
D O I：
10.1007/978-981-13-7091-5_23
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
Analog multiplier is a key element in modern communication systems. This paper presents the capability of cross-coupled operational transconductance amplifier (OTA) as an analog multiplier with performance analysis and design consideration. The proposed OTA structure is built and tested as a multiplier in Cadence Analog Design Environment (ADE) using standard 0.18 mu m CMOS process. The simulation result shows that the proposed OTA structured multiplier has better linearity with comparable power consumption and noise performance.
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页码：244 / 259
页数：16
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