Scalable implementation of H.263 video encoder on a parallel DSP system

被引：0

作者：

Kolinummi, P ^{[1
]}

Särkijärvi, J ^{[1
]}

Hämäläinen, T ^{[1
]}

Saarinen, J ^{[1
]}

机构：

[1] Tampere Univ Technol, Digital & Comp Syst Lab, FIN-33720 Tampere, Finland

来源：

ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL I: EMERGING TECHNOLOGIES FOR THE 21ST CENTURY | 2000年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A parallel implementation of H.263 video encoder is presented for video conferencing applications. The parallel mapping has low communication and memory requirements and is scalable, which allows encoding of any of the five standard H.263 picture formats in real-time. The presented parallelization method is implemented in a linearly expandable multiprocessor system called PARNEU, which includes very versatile communication topology. With the prototype system using four ADSP-21062 DSPs, a real-time encoding is achieved with QCIF sized picture. Performance estimations given for a larger system show very good speed-up figures.

引用

页码：551 / 554

页数：4

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