Efficient fair queueing for ATM networks using uniform round robin

被引:0
|
作者
Matsufuru, N [1 ]
Nishimura, K
Aibara, R
机构
[1] Hiroshima Univ, Grad Sch Engn, Higashihiroshima 7398527, Japan
[2] Hiroshima Univ, Informat Proc Ctr, Higashihiroshima 7398526, Japan
关键词
ATM switch; weighted round robin; slot assignment algorithm; hierarchical scheduling discipline;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we study efficient scheduling algorithms that are suitable for ATM networks. In ATM networks, all packets have a fixed small length of 53 bytes and they are transmitted at very high rate. Thus time complexity of a scheduling algorithm is quite important, Most scheduling algorithms proposed so far have a complexity of O(logN) per packet, where N denotes the number of connections sharing the link. In contrast. weighted round robin (WRR) has the advantage of having O(1) complexity; however, it is known that its delay property gets worse as N increases. To solve this problem, in this paper we propose two new variants of WRR, uniform round robin (URR) and idling uniform round robin (I-URR). Both disciplines provide end-to-end delay and fairness bounds which are independent of N. Complexity of URR, however, slightly increases as N increases. while I-URR has: complexity of O(1) per packet. I-URR also works as a traffic shaper, so that it can significantly alleviate congestion on the network. We also introduce a hierarchical WRR discipline (H-WRR) which consists of different WRR servers using I-URR as the root server. H-WRR efficiently accommodates both guaranteed and best-effort connections, while maintaining O(1) complexity per packet. If several connections are reserving the same bandwidth, H-WRR provides them with delay bounds that are close to those of weighted fair queueing.
引用
收藏
页码:1330 / 1341
页数:12
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