Virtual in-circuit emulation for timing accurate system prototyping

被引:1
|
作者
Benini, L [1 ]
Bruni, D [1 ]
Drago, N [1 ]
Fummi, F [1 ]
Poncino, M [1 ]
机构
[1] Univ Bologna, I-40136 Bologna, Italy
关键词
D O I
10.1109/ASIC.2002.1158029
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
This paper presents a novel HW/SW verification methodology called virtual in-circuit emulation, that is suitable for platform-based design paradigm, where the main objective of co-verification is to validate the interaction between an existing core processor and some application-specific peripheral system. The proposed co-verification solution shares with conventional emulation schemes the possibility of performing both functional and timing-accurate validation with the same accuracy of the hardware, and greater speed than simulation software, yet it achieve this at a minuscule fraction of the cost of a conventional emulation system. We have validated the virtual in-circuit emulation paradigm on a real board hosting an ARM core and various hardware peripherals running an embedded application, that has been interfaced to a custom-designed I/O unit for the acquisition of data sample, described in SystemC.
引用
收藏
页码:49 / 53
页数:5
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