A reverse bias, tip-insulator-semiconductor tunnel diode model accounting for the delineation of a p/p+ junction using scanning tunneling microscopy

In this article, a tunneling-generation-avalanche model has been proposed to explain the reverse bias current-voltage behavior observed at a tip/air/p-type silicon junction. Based on this model, under conditions where the applied bias is more negative than the flat band voltage, the current will be dominated by generation processes, which has significant doping density dependence. Since mechanically cut tips, used in this work, can have complicated geometries, geometric effects, such as extended gates and concentration of the electrical field must be taken into account. By taking these factors into account, good agreement between theory and experiments can be achieved. Finally, in the presence of illumination, p/p(+) junctions can be delineated successfully by taking advantage of the generation process. These results demonstrate that scanning tunneling microscopy can be used as a powerful tool for characterizing semiconductor devices. (C) 2000 American Institute of Physics. [S0021- 8979(00)06609-3].