Heterogeneous Multicore SoC With SiP for Secure Multimedia Applications

被引:8
|
作者
Kondo, Hiroyuki [1 ]
Otani, Sugako [1 ]
Nakajima, Masami [1 ]
Yamamoto, Osamu [1 ]
Masui, Norio [1 ]
Okumura, Naoto [1 ]
Sakugawa, Mamoru [1 ]
Kitao, Masaya [1 ]
Ishimi, Koichi [1 ]
Sato, Masayuki [1 ]
Fukuzawa, Fumitaka [1 ]
Imasu, Satoshi [2 ]
Kinoshita, Nobuhiro [2 ]
Ota, Yusuke [2 ]
Arimoto, Kazutami [1 ]
Shimizu, Toru [1 ]
机构
[1] Renesas Technol Corp, Itami, Hyogo 6640005, Japan
[2] Renesas Technol Corp, Tokyo 1878588, Japan
关键词
Heterogeneous multicore SoC; secure multimedia application; highly tamper-resistant system; system in a package; multicore hypervisor; IMPLEMENTATION; DESIGN;
D O I
10.1109/JSSC.2009.2022219
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A heterogeneous multicore system-on-chip (SoC) has been developed for high-definition (HD) multimedia applications that require secure DRM (digital rights management). The SoC integrates three types of processors: two specific-purpose accelerators for cipher and high-resolution video decoding; one general-purpose accelerator (MX); and three CPUs. This is how our SoC achieves high performance and low power consumption with hardware customized for video processing applications that process a large amount of data. To achieve secure data control, hardware memory management and software system virtualization are adopted. The security of the system is the result of the cooperation between the hardware and software on the system. Furthermore, a highly tamper-resistant system is provided on our SiP (System in a package), through DDR2 SDRAMs and a flash memory that contain confidential information in one package. This secure multimedia processor provides a solution to protect contents and to safely deliver secure sensitive information when processing billing transactions that involve digital content delivery. The SoC was implemented in a 90 nm generic CMOS technology.
引用
收藏
页码:2251 / 2259
页数:9
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