A 1.3V 26mW 3.2GS/s Undersampled LC Bandpass ΣΔ ADC for a SDR ISM-band Receiver in 130nm CMOS

被引：0

作者：

Beilleau, Nicolas ^{[1
]}

Aboushady, Hassan ^{[1
]}

Montaudon, Franck ^{[2
]}

Cathelin, Andreia ^{[2
]}

机构：

[1] Univ Paris 06, LIP6, SoC Lab, Paris, France

[2] ST Microelectron, Grenoble, France

来源：

RFIC: 2009 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM | 2009年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents the implementation of an undersampled LC bandpass Sigma Delta ADC with a raised-cosine feedback DAC. It directly converts after the LNA a signal centered in the ISM band at 2.442GHz with a sampling frequency of 3.256GHz. This circuit has been fabricated in a 130nm CMOS process, it occupies an area of 0.27mm(2) and is operating at a supply voltage of 1.3V. The Signal-to-Noise and Distortion Ratios measured are 34dB, 37dB and 42dB for respective bandwidths of 25MHz, 10MHz and 1MHz. The power consumption of the Sigma Delta ADC is 26mW and its figure of merit is 2.3pJ/bit.

引用

页码：343 / +

页数：2