共 50 条
- [1] Electrostatic Discharge - ESD [J]. 1998 IEEE INTERNATIONAL INTEGRATED RELIABIILTY WORKSHOP FINAL REPORT, 1998, : 94 - 96
- [2] Unified Circuit Modeling Technique for the Simulation of Electrostatic Discharge (ESD) Injected by an ESD Generator [J]. 2012 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC), 2012, : 340 - 345
- [3] Design and modeling of on-chip electrostatic discharge (ESD) protection structures [J]. 2004 24TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, PROCEEDINGS, VOLS 1 AND 2, 2004, : 619 - 624
- [4] Esd control: A grip on electrostatic discharge [J]. 1600, HPCi Media LTD, 17 Mill Street, London, SE1 2BZ, United Kingdom (28): : 51 - 52
- [5] On-chip electrostatic discharge ESD [J]. MICROELECTRONICS RELIABILITY, 2003, 43 (07) : 985 - 986
- [6] CONSIDERATIONS TO ELECTROSTATIC DISCHARGE (ESD) TESTING [J]. PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON PYROTECHNICS AND EXPLOSIVES, OCTOBER 12-15, 1987, BEIJING, CHINA, 1987, : 757 - 762
- [9] A Study on the Electrostatic Discharge (ESD) Defect in SOH Mask Pattern Cleaning [J]. ULTRA CLEAN PROCESSING OF SEMICONDUCTOR SURFACES XIII, 2016, 255 : 182 - 185
- [10] Electrostatic discharge (ESD) - facts and faults - a review [J]. Packaging Technology and Science, 1995, 8 (05): : 231 - 247