Real-time parallel implementation of road traffic radar video processing algorithms on a parallel architecture based on DSP and ARM processors

被引：0
|
作者：
Klilou, Abdessamad [1 ]
Bourzeix, Francois [1 ]
Bourja, Omar [1 ]
Zennayi, Yahya [1 ]
Mabrouk, Lhoussein [2 ]
Belkouch, Said [2 ]
机构：
[1] Moroccan Fdn Adv Sci Innovat & Res MAScIR, Embedded Syst Dept, Rabat, Morocco
[2] Univ Cadi Ayyad, Ecole Natl Sci Appl, Marrakech, Morocco
来源：
2015 15TH INTERNATIONAL CONFERENCE ON INTELLIGENT SYSTEMS DESIGN AND APPLICATIONS (ISDA) | 2015年
关键词：
road traffic radar; video processing; real-time processing; parallel architecture;
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
Machine vision algorithms require high-computing power. A high performance parallel system has been proposed in this paper by implementing a road traffic radar video processing chain in real-time on a new embedded architecture. The proposed machine consists of the Digital Signal Processor (DSP) 66AK2H12 from Texas Instruments (TI). The goal of this paper is the estimation of the vehicles number, speeds and classification through an optimal exploitation of the parallel architecture based on DSP and ARM cores and high speed buses used in the video acquisition and processing.
引用
收藏
页码：183 / 188
页数：6
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