A Hash Based Architecture of Longest Prefix Matching for Fast IP Processing

被引：0

作者：

Ghosh, Surajeet ^{[1
]}

Baliyan, Maitraya ^{[1
]}

机构：

[1] Indian Inst Engn Sci & Technol, Dept Comp Sci & Technol, Sibpur, Howrah, India

来源：

PROCEEDINGS OF THE 2016 IEEE REGION 10 CONFERENCE (TENCON) | 2016年

关键词：

Longest Prefix Matching; Routing table; IP address lookup; Packet routing; SRAM based IP lookup; Hash based IP lookup; BLOOM FILTERS;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A novel hardware architecture of longest prefix match (LPM) search scheme based on hashing and controlled prefix expansion has been presented to achieve fast IP processing. The main idea of this architecture is to simplify the required hash functions and implemented in hardware for faster generation of addresses of the routing tables. The routing table has been implemented using SRAM to accommodate huge number of prefixes for real time packet forwarding. It is also to be noted that this architecture consumes one memory cycle to store new prefixes, search prefixes and modify existing prefixes and is reducing memory requirement unlike conventional and existing LPM solutions.

引用

页码：228 / 231

页数：4

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