Software Implementation of RSA on SH2A-Dual Core

被引：0
|
作者：
Fukuda, Sayaka [1 ]
机构：
[1] Renesas Solut Corp, Yodogawa Ku, Osaka, Japan
来源：
ISCE: 2009 IEEE 13TH INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS, VOLS 1 AND 2 | 2009年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We implemented cipher primitive RSA for SH7265 processor that has 2 core architecture. Assigning each processors to appropriate functions, as a result, we could speed up the cipher operations by 5.41 compared to straight forward coding and 1.48 to single chip mode CRT coding.
引用
收藏
页码：1009 / 1011
页数：3
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