Reconfigurable Fault-Tolerant System Sychronization

被引：1
|
作者：
Balach, Jan [1 ]
Novak, Ondrej [1 ]
机构：
[1] Czech Tech Univ, Dept Digital Design, Prague, Czech Republic
来源：
13TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN: ARCHITECTURES, METHODS AND TOOLS | 2010年
关键词：
FPGA; Fault Tolerant Architecture; FPGA Reconfiguration;
D O I：
10.1109/DSD.2010.103
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A method and architecture for synchronization of Fault-Tolerant system implemented in FPGAs is proposed. It is based on repairing faulty units and transferring of the fault free state of the system to the unit under repair. Its architecture is based on the previously designed model which is extended for usage in more complex systems. The proposed method was implemented on an FPGA and the experimental architecture with an analysis of the results is given.
引用
收藏
页码：817 / 820
页数：4
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