Timescale Algorithm at CSIR-NPL

被引:0
|
作者
Olaniya, Mahavir Prasad [1 ]
Yadav, Suchi [1 ]
Kandpal, Preeti [1 ]
Dix, Mohit [1 ,2 ]
Agarwal, Ashish [1 ,2 ]
机构
[1] CSIR Natl Phys Lab, Ncw Delhi, India
[2] Acad Sci & Innovat Res, Chennai, Tamil Nadu, India
关键词
D O I
10.23919/ursiap-rasc.2019.8738334
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A timescale algorithm is developed at CSIR-NPL (Council of Scientific and Industrial Research-National Physical Laboratory, New Delhi) to steer UTC (NPLI) towards the UTC. The algorithm is based on weighted average of an Active Hydrogen Maser (AHM) and five high performance cesium clocks.
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页数:3
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