An embedded multi-model video encoder

被引：0

作者：

Meng Qinglei ^{[1
]}

Jiang Li ^{[1
]}

Li Wei ^{[1
]}

机构：

[1] BeiHang Univ, Digital Media Lab, Dept Comp Sci & Technol, Beijing 100083, Peoples R China

来源：

2006 CHINESE CONTROL CONFERENCE, VOLS 1-5 | 2006年

关键词：

MPEG-4; DSP; FPGA; EDMA; linear assembly;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Nowadays, with the growing of multimedia applications, requirement for embedded multimedia system becomes popular. The implementation of a Multi-Model video encoder is introduced, which is composed of DSP (Digital signal processor) and FPGA (Field Programmable Gate Array). The FPGA complete some auxiliary tasks, such as video acquisition and YUV separation, while the DSP is dedicated for video compression. Considering the features of the DSP's architecture and memory resource, as well as the requirements of compression algorithms, the system level optimization strategies and code level optimization techniques are discussed. A feasible solution is given to avoid the overflow and underflow while transmitting the compressed data. The experimental results indicate that the embedded video encoder can adapt to different channels and compress various gray/color pictures with different resolutions.

引用

页码：938 / +

页数：2