Scalable, dynamic and growing hardware self-organizing architecture for real-time vector quantization

In the era of the Internet of Things (IoT) and Big Data (BD), a significant amount of data is permanently generated every day. The data size of collected data streams is now reaching zetta bytes (i.e., 10(21)), and their processing and analysis becomes more and more challenging especially in embedded systems, where the overall goal is to maximize performance per watt, while meeting real-time requirements and trying to keep the overall power consumption in the very limited power budgets. The collected data are often reduced by means of clustering, vector quantization or compression before their further processing. The unsupervised learning techniques such as Self-Organizing Maps (SOMs) not needing any prior knowledge of processed data are perfect candidates for this task. However, real-time vector quantization with SOMs requires high performances and dynamic online configurability. The software counterparts of SOMs are highly flexible with limited performances per watt whereas the hardware SOMs generally lack of flexibility. In this paper, a novel scalable, dynamic and growing hardware selforganizing map (SOM) is presented. The presented hardware SOM architecture is dynamically configurable and adaptable in terms of neurons, map size and vector dimension depending on the application-specific needs. The proposed architecture is validated on different map sizes (up to 16x16) with different vector widths applied for real-time color quantization and pattern distribution recognition.