Optimizing polynomial expressions by algebraic factorization and common subexpression elimination

被引:25
|
作者
Hosangadi, Anup [1 ]
Fallah, Farzan
Kastner, Ryan
机构
[1] Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA
[2] Fujitsu Labs Ltd, Sunnyvale, CA 94085 USA
关键词
circuit complexity; common subexpression elimination (CSE); high-level synthesis; polynomials;
D O I
10.1109/TCAD.2006.875712
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Polynomial expressions are frequently encountered in many application domains, particularly in signal processing and computer graphics. Conventional compiler techniques for redundancy elimination such as common subexpression elimination (CSE) are not suited for manipulating polynomial expressions, and designers often resort to hand optimizing these expressions. This paper leverages the algebraic techniques originally developed for multilevel logic synthesis to optimize polynomial expressions by factoring and eliminating common subexprmions. The proposed algorithm was tested on a set of benchmark polynomial expressions where savings of 26.7% in latency and 26.4% in energy consumption were observed for computing these expressions on the StrongARM SA1100 processor core. When these expressions were synthesized in custom hardware, average energy savings of 63.4% for minimum hardware constraints and 24.6% for medium hardware constraints over CSE were observed.
引用
收藏
页码:2012 / 2022
页数:11
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