Synthesis of hierarchical systems

被引:13
|
作者
Aminof, Benjamin [1 ]
Mogavero, Fabio [2 ]
Murano, Aniello [2 ]
机构
[1] Hebrew Univ Jerusalem, IL-91904 Jerusalem, Israel
[2] Univ Naples Federico II, I-80126 Naples, Italy
关键词
Hierarchical systems; mu-Calculus; Temporal logics; Parity games; Synthesis; PUSHDOWN MODULE CHECKING; IMPROVED MODEL CHECKING; TEMPORAL LOGIC; AUTOMATA; CALCULUS;
D O I
10.1016/j.scico.2013.07.001
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
In automated synthesis, given a specification, we automatically create a system that is guaranteed to satisfy the specification. In the classical temporal synthesis algorithms, one usually creates a "flat" system "from scratch". However, real-life software and hardware systems are usually created using preexisting libraries of reusable components, and are not "flat" since repeated sub-systems are described only once. In this work we describe an algorithm for the synthesis of a hierarchical system from a library of hierarchical components, which follows the "bottom-up" approach to system design. Our algorithm works by synthesizing in many rounds, when at each round the system designer provides the specification of the currently desired module, which is then automatically synthesized using the initial library and the previously constructed modules. To ensure that the synthesized module actually takes advantage of the available high-level modules, we guide the algorithm by enforcing certain modularity criteria. We show that the synthesis of a hierarchical system from a library of hierarchical components is EXPTIME-complete for mu-calculus, and 2EXPTIME-complete for LTL, both in the cases of complete and incomplete information. Thus, in all cases, it is not harder than the classical synthesis problem (of synthesizing flat systems "from scratch"), even though the synthesized hierarchical system may be exponentially smaller than a flat one. (C) 2013 Elsevier B.V. All rights reserved.
引用
收藏
页码:56 / 79
页数:24
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