CMOS Digitally Programmable Lock-in Amplifier for EEG Detection System

This paper presents a new Lock-in Amplifier used in biomedical applications like Electroencephalogram (EEG) detection system. The proposed lock-in amplifier consists of five stages: the first and third stages are Four Quadrant CMOS Analog multipliers, the second stage is band pass filter with digitally programmable gain amplifier (DPGA), and the last two stages are low pass filter (LPF) and DPGA respectively. The basic building block of the filters and amplifier in this system is the digitally programmable operational transconductance amplifier (DPOTA). LT Spice simulation is done using 0.25-mu m CMOS technology. The overall voltage gain for the maximum digital bit of the system is 100dB at +/- 0.8V supply voltage and input referred noise is 3.66 mu V/root Hz.