VLSI circuit design using an object-oriented framework of evolutionary graph generation system

被引:0
|
作者
Homma, N [1 ]
Natsui, M [1 ]
Aoki, T [1 ]
Higuchi, T [1 ]
机构
[1] Tohoku Univ, Grad Sch Informat Sci, Sendai, Miyagi 9808579, Japan
关键词
D O I
10.1109/CEC.2003.1299564
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
This paper presents a generic object-oriented framework of Evolutionary Graph Generation (EGG) for automated circuit synthesis. The EGG system can be systematically implemented for different design problems by inheriting the framework class templates. The potential capability of EGG framework is demonstrated through experimental synthesis of both digital and analog circuits. Design examples discussed in this paper are (i) bit-serial multipliers using bit-level arithmetic components, and (ii) current mirrors using transistor-level components.
引用
收藏
页码:115 / 122
页数:8
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