Detection and GPU Accelerationof 3D FDTD Algorithms Based on Memory Access Patterns

A semi-automatic tool is reported that first analyzes the sequential FDTD program to obtain memory access patterns and related features, and then optimizes the FDTD program with combined use of several types of CUDA memory on both Fermi and Kepler architecture GPUs. The experiments show a 13% and 18% speedup using Fermi and Kepler GPUs respectively compared to the GPU version program without optimization. Up to 142 times speedup is achieved compared to the sequential FDTD C program at a FDTD 3D mesh size of 250*250*250 (15.625 million mesh cells) with 10 layers CPML boundary conditions in 4096 time steps.