α-order universal filter realization based on single input multi-output differential voltage current conveyor

被引:0
|
作者
Ghoneim, Mohamed [1 ]
Hesham, Rana [1 ]
Yassin, Heba [1 ]
Madian, Ahmed [1 ,2 ]
机构
[1] Nile Univ, Nanoelect Integrated Syst Ctr NISC, Giza, Egypt
[2] Egyptian Atom Energy Author, NCRRT, Radiat Engn Dept, Cairo, Egypt
关键词
DVCC; Active filters; Fractional calculus; Universal fractional filters;
D O I
10.1007/s10470-020-01753-3
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Two voltage-mode topologies single input multi-output universal fractional filters with high input impedance are proposed. The proposed analog filters consist of three DVCC+ blocks, two grounded capacitors and two resistors targeting the minimum passive elements. The proposed topologies provide a realization for all standard fractional filter functions (HP, LP, BP, AP and notch filter). The effect of Fractional order on filter responses in the range of alpha from 0.7 to 1.2 was studied. Fractional order has been investigated for different filter responses in terms of cutoff, gain, phase and noise. The central frequency was designed to be 110 KHz for the first topology, while that of the second topology is around 100 KHz. The proposed filters are simulated using Cadence TSMC 130nm with dual supply voltages +/- 0.75V. A performance comparison between the proposed topologies and the topologies in the literature shows that the proposed architecture gives an acceptable performance.
引用
收藏
页码:411 / 422
页数:12
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