Effects of a trench under the gate in high voltage RESURF LDMOSFET for SOI power integrated circuits

被引：18
|
作者：
Son, WS
Sohn, YH
Choi, SY
机构：
[1] Kyungpook Natl Univ, Sch Elect Engn & Comp Sci, Taegu 702701, South Korea
[2] Yeungnam Univ, Sch Elect Engn & Comp Sci, Kyongsan 712749, South Korea
来源：
SOLID-STATE ELECTRONICS | 2004年 / 48卷 / 09期
关键词：
LDMOSFET; SOI; trench; power integrated circuits;
D O I：
10.1016/j.sse.2004.02.023
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new structure of RESURF LDMOSFET is proposed, based on silicon-on-insulator, to improve the characteristics of the breakdown voltage and the specific on-resistance, where a trench is applied under the gate in the drift region. A trench is used to reduce the electric field under the gate when the concentration of the drift region is high, thereby increasing the breakdown voltage and reducing the specific on-resistance. Detailed numerical simulations demonstrate the characteristics of this device and indicate an enhancement on the performance of the breakdown voltage and the specific on-resistance in comparison with an optimal conventional device with LOCOS under the gate. (C) 2004 Elsevier Ltd. All rights reserved.
引用
收藏
页码：1629 / 1635
页数：7
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