MOST Moderate-Weak-Inversion Region as the Optimum Design Zone for CMOS 2.4-GHz CS-LNAs

被引:48
|
作者
Fiorelli, Rafaella [1 ]
Silveira, Fernando [2 ]
Peralias, Eduardo [1 ]
机构
[1] CSIC, Inst Microelect Sevilla IMSE CNM, Seville 41092, Spain
[2] Univ Republica, Inst Ingn Electr, Montevideo 11300, Uruguay
关键词
Common-source low-noise amplifiers (CS-LNAs); design methodology; g(m)/I-D; low power; moderate inversion (MI); optimization; Pareto optimal; weak-inversion (WI) noise figure (NF); NOISE AMPLIFIER DESIGN; OPTIMIZATION; CIRCUITS; TOOL;
D O I
10.1109/TMTT.2014.2303476
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, the MOS transistor (MOST) moderate- inversion (MI)-weak-inversion (WI) region is shown to be the optimum design zone for CMOS 2.4-GHz common-source low-noise amplifiers (CS-LNAs) focused on low power consumption applications. This statement is supported by a systematic study where the MOST is analyzed in all-inversion regions using an exhaustive CS-LNA noise-figure (NF)-power-consumption optimization technique with power gain constraint. Effects of bias choke resistance and MOST capacitances are carefully included in the study to obtain more accurate results, especially for the MI-WI region. NF, power consumption, and gain versus the inversion region are described with design space maps, providing the designer with a deep insight of their tradeoffs. The Pareto-optimal design frontier obtained by calculation-showing the MI-WI region as the optimum design zone-is reverified by extensive electrical simulations of a high number of designs. Finally, one 90-nm 2.4-GHz CS-LNA Pareto-optimal design is implemented. It achieves the best figure of merit considering under-milliwatt CS-LNAs published designs, consuming 684 mu W, an NF of 4.36 dB, a power gain of 9.7 dB, and a third-order intermodulation intercept point of -4 dBm with load and source resistances of 50 Omega.
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页码:556 / 566
页数:11
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